Control of nichrome resistor temperature coefficient using RF plasma sputter etch

ABSTRACT

A method for processing a partially fabricated semiconductor wafer having a layer of nichrome resistor material patterned to form a plurality of nichrome resistors on a surface of the wafer includes performing a wet pre-metallization cleaning step on the wafer surface, performing an RF argon plasma sputter etching process on the wafer surface, advancing the wafer into a second reactor without breaking a vacuum in either reactor, depositing a layer of metal on the surface, patterning the metal to form a predetermined metal interconnection pattern thereof, performing a stabilization bake cycles on the wafer, measuring the TCR of the nichrome resistor material, and rejecting the wafer if the measured TCR is greater than a predetermined value.

BACKGROUND OF THE INVENTION

[0001] The present invention relates generally to manufacture ofintegrated circuits, and more particularly to minimization andstabilization of the temperature coefficient of nichrome resistorsformed on integrated circuits.

[0002] It is well known that the resistances of nichrome thin filmresistors formed on integrated circuit wafers undergo substantialshifts. The TCR (temperature coefficient of resistance) of the nichromematerial is one of the ways in which this shift can be quantified. Thenichrome material is a nickel chromium oxide that is deposited as a thinfilm on the semiconductor wafer during the wafer fabrication process andthen baked in a nitrogen-oxygen environment to cause the sheetresistance of the film to attain a certain value. After waferfabrication is complete, the wafer is transferred to an electricaltesting facility. After electrical testing, the wafers are transferredto a packaging facility wherein the individual integrated circuit chips(die) are separated and packaged before final testing. Many integratedcircuits are designed with a requirement that the TCR of nichromeresistors thereon be less than a specified maximum value.

[0003] The largest shift in the TCR of nichrome resistors usually occursduring the packaging of individual integrated circuit chips after theintegrated circuit wafer fabrication and laser trimming of the nichromeresistors is complete. The TCR of a particular wafer fabrication processused by the present assignee is usually roughly 30 ppm (parts permillion)/° C. The above described TCR shifts in the nichrome resistorsusually are positive shifts. The amount of the shift due to thepackaging environment typically is highly variable from day to day (andeven from hour to hour), for reasons that are neither well understoodnor presently controllable, apparently because the “interactions” of thenichrome material with various aspects of the wafer fabricationprocesses and the subsequent packaging processes are highly variable.

[0004] If the TCR shifts could be reliably minimized or made slightlynegative, this would make it possible to greatly reduce the number ofwafers rejected at the end of the wafer fabrication process, andtherefore would make it possible to greatly reduce the economic lossassociated with the rejection of such wafers.

[0005] The above described TCR shift may be very problematic becausewafer fabrication facilities usually establish a certain specificationfor the maximum acceptable TCR of the nichrome resistors of a particularintegrated circuit product.

[0006] In the known wafer fabrication process, which is subsequentlydescribed in more detail with reference to the process flowchart of FIG.4, the TCR of the nichrome resistors of each wafer is measured beforethe wafers are transferred to the electrical testing facility. If themeasured TCR of the nichrome on a semiconductor wafer, which typicallyincludes hundreds of integrated circuit chips, exceeds a maximumspecified TCR (referred to herein as TCR_(MAX)), the entire wafer mustbe scrapped consequently, the very large economic cost that has beenincurred in fabricating the wafer up to that point is lost.

[0007] The TCR measurements are made after the wafers are baked orstabilized prior to the passivation process. The values of sheetresistance of the nichrome material on the wafers are probed andmeasured at 45 degrees Centigrade. Then the wafers are heated and thesheet resistance values are measured again at 145 degrees Centigrade.The value of the TCR then is computed from the two sheet resistancemeasurements. If the computed value of the TCR of the wafer is notwithin the specified limits established for the integrated circuitsunder consideration, the wafer will be rejected.

[0008] RF plasma sputter etching techniques are commonly utilized inmanufacture of integrated circuit wafers to pre-clean wafers prior tometal deposition on integrated circuit wafers being manufactured. See“Silicon Processing for VLSI Era” by S. Wolf, Process Integration, 2000,Page 108, Lettuce Press. RF plasma sputter etching is a process whereinan inductively coupled power supply provides energy to a coil woundaround a reactor chamber to produce a medium frequency plasma of argonin a reaction chamber. RF power is applied to a chuck which supports awafer and produces an RF bias that causes the Ar+ ions to impinge on thesurfaces of the wafer and remove contaminant material therefrom.

[0009] Thus, there is an unmet need for a procedure which lowers the TCRof nichrome resistors and which can be easily incorporated in standardor conventional integrated circuit wafer manufacturing processes.

[0010] There also is an unmet need for a procedure which lowers andstabilizes the TCR of nichrome resistors and which can be easilyincorporated in standard integrated circuit wafer manufacturingprocesses.

SUMMARY OF THE INVENTION

[0011] It is an object of the present invention to provide a method forlowering the TCR of nichrome resistors.

[0012] It is another object of the present invention to provide a methodfor lowering the TCR of nichrome resistors, which method can be easilyincorporated in a standard integrated circuit wafer manufacturingprocess.

[0013] It is another object of the present invention to provide a methodfor lowering and/stabilizing the TCR of nichrome resistors, which methodcan be easily incorporated in a standard integrated circuit wafermanufacturing process.

[0014] It is another object of the present invention to provide a methodfor lowering/stabilizing the TCR of nichrome resistors by a fixedamount.

[0015] It is another object of the present invention to provide a methodfor lowering/stabilizing the TCR of resistors other than nichromeresistors.

[0016] Briefly described, and in accordance with one embodiment, thepresent invention provides a method for processing a partiallyfabricated semiconductor wafer having a layer of resistor materialpatterned to form a plurality of resistors on a surface of the wafer,the method including performing a wet pre-metallization cleaning step onthe surface of the wafer, performing an RF plasma sputter etchingprocess on the surface of the wafer in the first reactor, advancing thewafer from the first reactor into a second reactor while maintainingunbroken vacuum conditions in the first and second reactors, anddepositing a layer of metal on the surface of the wafer in the secondreactor. The metal then is patterned to form a predetermined metalinterconnection pattern. A stabilization bake cycle then is performed onthe wafer. The TCR of the resistor material is measured, and the waferis rejected if the measured TCR is greater than a predetermined value,but otherwise fabrication of the wafer is completed. In the describedmethod, the resistor material is composed of nichrome. Argon gas ispassed into the first reactor with the wafer therein, and an inductivelycoupled power supply produces argon plasma in the first reactor adjacentto the surface of the wafer. An RF bias signal is applied to the waferto cause argon ions to impinge on the surface of the wafer and removecontaminant material therefrom. The RF plasma etching is performed forapproximately 15-30 seconds. with the wafer at a temperature ofapproximately 400 degrees Centigrade. The RF signal has a voltage ofapproximately 100 volts and a frequency of approximately 13.5 MHz andcauses the wafer to attract the argon ions. The argon plasma isgenerated by means of an inductive coil wound around a reaction chamberof the first reactor by applying a medium frequency power supply signalhaving a frequency of approximately 100 kHz across the inductive coil.

BRIEF DESCRIPTION OF THE DRAWINGS

[0017]FIG. 1 is a simplified section view of a prior art RF plasmasputter etching reactor in which the RF plasma sputter etching processof the present invention is performed.

[0018]FIG. 2 is a simplified section view of the index wheel 15 of thereactor in FIG. 1 illustrating its relationship to multiple reactorsinto which wafers supported by index wheel 15 can be sequentiallyadvanced without breaking the vacuum in the reactors.

[0019]FIG. 3 is a simplified section view of a prior art sputterdeposition reactor into which the wafer 9 is moved for metal depositionafter the RF plasma sputter etching process is performed.

[0020]FIG. 4 is a simplified flowchart illustrating prior artmanufacture of an integrated circuit wafer having nichrome resistorsthereon.

[0021]FIG. 5 shows a modification to the prior art process of FIG. 4 toinclude RF plasma sputter etching of thin film nichrome resistormaterial according to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] Referring to FIG. 1, a sectional view of an RF plasma sputteretch system 1 is shown in which the RF plasma sputter etch process ofthe present invention is performed. Reactor 1 is a “pre clean” reactoror “soft etch chamber” of the “TEL MARK II” system that is commerciallyavailable from Tokyo Electron Arizona, Inc. The three key components ofthe reactor are a heated back plane assembly 7, a wafer holder 22, and abell jar 21. Back plane assembly 7 contains a heater element (notshown), a feed through connection 13 for the “backside” gas, andconductors 12 to receive an RF bias signal. A 4-inch diameter wafer 9,which is vertically supported in a wafer holder 22, is introduced (assubsequently explained) into a vacuum chamber 8 of reactor 1. Wafer 9has one or more nichrome resistors 35 on the surface of wafer 9 which isexposed when wafer 9 is supported vertically as shown in FIG. 1.

[0023] Wafer holder 22 is one of five wafer holders that are supportedby an index wheel 15, which is also shown in FIG. 2. Wafer holder 22provides a coupling between wafer 9 and backplane assembly 7. Thebackside gas supplied through tube 13 provides a thermal couplingbetween the heated backplane assembly 7 and wafer 9. The backside gascan be used to provide convective cooling or heating of wafer 9.

[0024] Referring to FIG. 2, index wheel 15 and its five wafer holders 22can be rotated about an axle 29 in the direction of arrow 48 to advancethe various wafers into the four reactors 1, 1A, 1B and 1C included inthe above mentioned TEL MARK II system to align the wafers with thechambers of the four reactors, including the above described “soft etchchamber” reactor 1 of FIG. 1 and a “sputter deposition chamber” reactor1A indicated in FIG. 2 and shown in detail in FIG. 3. Reference numeral49 designates a “load lock” passage through which each wafer isintroduced into or removed from the TEL MARK II system. The variouswafers supported by index wheel 15 are also advanced into the twoadditional reactors 1B and 1C after being processed in the first tworeactors 1 and 1A.

[0025] Sputter deposition chamber 1A is part of the TEL MARK II systemavailable from Tokyo Electron Arizona, Inc., and is used for sputterdeposition of the aluminum metallization referred to in block 102A ofthe process flow chart of FIG. 5, after the conventional wetpre-metallization cleaning step referred to in block 101 of FIG. 4.Sputter deposition chamber 1A is similar in many respects to reactor 1of FIG. 1, but includes an aluminum target source 41 having a copperback plate 42, and also includes a drive motor 43 which is used inconjunction with a drive bell 45 and pulley assembly 44 to drive a“magnet pack” (not shown) within cathode assembly 40 to rotate themagnet pack at a particular rate, in order to obtain good uniformityduring aluminum deposition.

[0026] Thus, index wheel 15 can be rotated to advance each wafer intothe next reaction chamber, and a fixed plenum 14 associated with eachreaction chamber and a movable plenum 18 associated with each station onindex wheel 15 perform the functions of sealing and unsealing thevarious wafers supported by index wheel 15 while maintaining unbrokenvacuum conditions in each of the four reaction chambers, which are usedto successively perform different processing functions on the wafers asthey are advanced. The detailed function of each part shown in FIG. 1can be obtained from the Tokyo Electron Limited operation manual andTokyo Electron Limited patents on the soft etch chamber.

[0027] When argon is introduced into reaction chamber 8 of reactor 1, aninductively coupled power supply producing a power signal having afrequency of approximately 100 kHz is applied to coil 20 by conductors23. This causes an argon plasma to be produced in reaction chamber 8adjacent to the exposed surface of wafer 9. RF power is applied to backplane assembly 7 via conductors 12 and also is applied via back planeassembly 7 to wafer 9. This causes wafer 9 to attract Ar+ ions of theplasma during the negative portion of each RF cycle, causing the Ar+ions to impinge on the outer surface of wafer 9 and, in accordance withthe present invention, thereby remove (i.e., etch) contaminant materialfrom the surfaces of nichrome resistors (such as resistor 35 in FIG. 1)previously formed thereon. The material removed from the surface ofwafer 9 sticks to the inside surface of bell jar 21. After the RF plasmaetch of the present invention has been performed in reactor 1, indexwheel 15 is rotated to advance wafer 9 from reactor 1 into the reactionchamber of reactor 1A without breaking the vacuum in either reactor 1 orreactor 1A. The sputter deposition of aluminum from aluminum source 41onto wafer 9 then is performed.

[0028] The frequency and voltage of the RF signal applied to wafer 9 viaconductors 12 and backplane assembly 7 can be approximately 13.5 MHz andapproximately 100 volts, respectively, although the bias voltage canvary from approximately 100 to 300 volts. The flow rate of the argon gasentering the above described reaction chamber 8 can be approximately 25standard cubic centimeters per minute. The wafer temperature establishedby the heated back plane assembly 7 can be approximately 100 to 400° C.The duration of an RF plasma sputter etching resulting from theapplication of the RF signal applied via electrical conductors 12 towafer 9 via conductors 12 and backplane assembly 7 can be approximately15-30 seconds.

[0029] As indicated later in Table 1, introduction of the RF plasmasputter etch process of the present invention has been found to reliablyreduce the TCR of nichrome resistors by roughly 30 ppm, and this has theeffect of stabilizing the TCR by reducing it to a level thatsubstantially reduces the number of wafers that have to be rejected inan integrated circuit wafer fabrication facility.

[0030]FIG. 4 is a flow chart that illustrates a relevant portion of aconventional wafer fabrication process, electrical testing, andpackaging for an integrated circuit product that is performed aftervarious conventional insulative oxide layers, various doped layers havebeen formed in and/or on the upper surface of semiconductor wafer 9, andafter a thin film of nichrome material has been deposited on the uppersurface of wafer 9.

[0031] Referring to FIG. 4, the conventional patterning of a photoresistlayer and subsequent conventional etching are performed in order todefine the shapes of one or more nichrome resistors 35 that are formedfrom the thin film of nichrome material, as indicated in block 100. Thena pre-metallization wet cleaning step is performed, as indicated block101. Next, interconnection metallization (typically aluminum) isdeposited on the exposed surface of wafer 9 in bell jar 21 of processingsystem 1, as indicated block 102.

[0032] Next, as indicated in block 103 of FIG. 4, conventionalpatterning of a photoresist layer and subsequent conventional etching ofthe deposited aluminum metallization are performed to define the shapesof the aluminum interconnection metallization of the integrated circuit.

[0033] Next, as indicated in block 104 of FIG. 4, the conventional waferfabrication process includes stabilization of resistors 35 on wafer 9.This is accomplished by performing multiple bake cycles in air on thewafers at 510 degrees Centigrade to cause the sheet resistances of theresistors 35 to reach certain a designated value. The sheet resistancesof pre-selected resistors on wafer 9 then are measured at 45 degreesCentigrade and 145 degrees Centigrade (although the sheet resistancemeasurements could be made at other temperatures). The value of the TCRof the resistors is calculated according to the expression:

TCR(ppm)={(Rs _(145 degrees) −Rs _(45 degree))*10⁶}/(Rs_(45 degrees*)100),

[0034] where Rs_(145 degrees) and Rs_(45 degrees) are the sheetresistances of the nichrome material at 145° C. and 45° C.,respectively.

[0035] The wafers having a TCR value greater than a maximum valueTCR_(MAX) specified for the above mentioned designated value of sheetresistance are rejected and scrapped.

[0036] After stabilization, a silicon dioxide passivation layer isdeposited on the remaining wafers, as indicated in block 105. Then thepassivation layer is patterned by conventional photoresist and etchingsteps, as indicated in block 106. The fabricated wafers then aretransferred to an electrical testing facility, and electrical parametersof the integrated circuits are tested, as indicated in block 107 of FIG.4. Next, the nichrome resistors 32 on the wafers 9 are laser trimmed tovery precise resistance values, as indicated in block 108. Then, overallelectrical circuit functionality of each chip is tested after thenichrome resistors are laser trimmed, as also indicated in block 108.Next, the wafers are transferred to a packaging facility where thewafers are sawed into individual chips (die). The usual die attach, wirebonding, and final test operations then are performed, as indicated inblock 109.

[0037] Referring next to FIG. 5, the RF plasma sputter etching processof the present invention is performed in system 1 of FIG. 1 immediatelyafter the wet pre-metallization cleaning process of block 101 of FIG. 4and immediately before the deposition of the aluminum metallization ofblock 102 of FIG. 4, as indicated in block 102A of FIG. 5.

[0038] Several experiments were performed between September, 2001 andFebruary, 2002 wherein each experiment included a number of wafersfabricated essentially identically (i.e., fabricated in the same lot),except that some of the wafers in each lot were additionally subjectedto the RF plasma sputter etch process in accordance with the presentinvention. Table 1 shows the average TCR of the wafers in each groupwhich were subjected to the RF plasma sputter etch and also shows theaverage TCR of the wafers in each group which were not subjected to theRF plasma sputter etch. TABLE 1 Group Number TCR without RF Etch TCRwith RF Etch TCR Shift 1 +9.8 ppm −17.2 ppm −27.0 ppm 2 +9.3 ppm −21.3ppm −30.6 ppm 3 +62.3 ppm +33 ppm −29.3 ppm 4 +62.3 ppm +28.7 ppm −33.6ppm

[0039] As can be seen from the results in Table 1, adding the RF plasmasputter etch step to the wafer fabrication process consistently reducedthe TCR by roughly 30 ppm.

[0040] The above described RF plasma sputter etching process is believedto contribute to the observed reduction and stabilization of the TCR ofnichrome resistors as a result of several mechanisms. The firstmechanism is the removal of an “oxygen skin” (adsorbed oxygen) on thesurface of the nichrome resistors. The adsorbed oxygen occurs becausechromium is very sensitive to oxidation, and getters oxygen at roomtemperature. However, the amount of adsorbed oxygen is highly variable,which causes the above mentioned high variability of the TCR of thenichrome resistors 35. Removal of the adsorbed oxygen during the RFsputter plasma etching process before in situ deposition of the aluminummetallization that makes electrical contact to terminals of the nichromeresistor material enhances the free (i.e., non-oxidized) chromiumcontent of the nichrome in the aluminum-nichrome contact region. TheCr₂O₃ interface that usually is formed by the prior art process at thealuminum-nichrome contact interface is eliminated, and consequently nochromium is consumed by formation of Cr₂O₃ during the laterstabilization bake cycles because the interface between the aluminummetallization and the nichrome is effectively sealed. The resultinghigher chromium content in the nichrome film leads to a reduction in theTCR of the nichrome resistors.

[0041] Another mechanism is thought to be that the RF plasma sputteretching process improves electrical contact between the nichrome and thealuminum metallization at the nichrome resistor-aluminum contact areas,because without any Cr₂O₃ barrier, some aluminum alloying into thenichrome at the contact area occurs during the later bake stabilizationprocess. The small amount of aluminum alloy resulting from a cleaninterface contact area between the aluminum and the nichrome results inlower, more consistent contact resistance, and consequently contributesto a reduction in the TCR of the nichrome resistors.

[0042] Also, the RF sputter plasma etching process reduces the thicknessof the nichrome film, and this results in a reduction of the TCR of thenichrome resistors 35 due to activated tunneling of charge carriersacross small gaps between nichrome islands in the Cr₂O₃ formed duringthe stabilization bake. This is required because Cr₂O₃ is formed againduring the stabilization bake in all areas except the contact area,since in the new process the contacts have been sealed with in situaluminum deposition after the RF plasma sputter etch.

[0043] Note that it is believed that a more detailed study is needed toquantify the individual contributions of each of the above mechanisms tothe reduction of the TCR of the nichrome resistors.

[0044] The above described RF plasma sputter etch process performed onnichrome resistors has been found to substantially eliminate the abovementioned day-to-day variability of TCR measurements for nichromeresistors.

[0045] The above described process of the present invention is easilyincorporated in pre-existing semiconductor manufacturing processes,without changes being required in the composition of the nichrome filmmaterial. Manufacture of integrated circuits having nichrome resistorswith a TCR stability of 25 ppm is feasible using the above described RFplasma sputter etching process, and this substantially reduces thenumber of rejected wafers prior to packaging due to TCR shiftinstability as a result of the packaging process and hence avoids theassociated economic loss.

[0046] Furthermore, it has been found that the magnitude of the fieldthreshold voltage of the semiconductor wafers is increased by thedescribed RF plasma sputter etching process, and also that the contactresistance between interconnect metallization and the various dopedsemiconductor regions is decreased by the described RF plasma sputteretching process. The RF sputter etching process tends to clean the fieldoxide surface of any contaminants, thereby reducing associated chargeeffects and consequently increasing the field threshold voltage. The RFsputter etching process also helps to remove any native oxide or polymermaterial in the silicon-aluminum contact region, and thereby allows goodsilicon-to-aluminum alloying, which results in lower, more reliablecontact resistance.

[0047] While the invention has been described with reference to severalparticular embodiments thereof, those skilled in the art will be able tomake the various modifications to the described embodiments of theinvention without departing from its true spirit and scope. It isintended that all elements or steps which are insubstantially differentfrom those recited in the claims but perform substantially the samefunctions, respectively, in substantially the same way to achieve thesame result as what is claimed are within the scope of the invention.For example, it is possible that the same mechanisms believed to loweror stabilize the TCR in nichrome in film layers could also provide thesame stabilization in other thin films than nichrome. The RF sputterplasma etching process of the present invention is equally applicable tonichrome films manufactured in MOS or CMOS manufacturing processes, aswell as to bipolar manufacturing processes. Other temperatures, timedurations, voltages, signal frequencies, wafer sizes, and the like couldbe used instead of the exemplary values used in the above describedpreferred embodiment of the invention.

What is claimed is:
 1. A method for processing a partially fabricatedsemiconductor wafer having a layer of resistor material patterned toform a resistor on a surface of the wafer, the method comprising: (a)performing a wet pre-metallization cleaning step on the surface of thewafer; (b) performing an RF plasma sputter etching process on thesurface of the wafer in a first reactor; (c) advancing the wafer fromthe first reactor into a second reactor while maintaining unbrokenvacuum conditions in the first and second reactors; (d) depositing alayer of metal on the surface of the wafer in the second reactor; (e)patterning the metal to form a predetermined metal interconnectionpattern thereof; (f) performing a stabilization bake cycle on the wafer,measuring the TCR of the resistor material, and rejecting the wafer ifthe measured TCR is greater than a predetermined value; and (g)completing fabrication of the wafer.
 2. The method of claim 1 whereinthe resistor material is composed of nichrome.
 3. The method of claim 2wherein step (b) is performed by passing argon gas into the firstreactor with the wafer therein and producing an argon plasma in thefirst reactor adjacent to the surface of the wafer, and the applying anRF signal to the wafer to cause argon ions to impinge on the surface ofthe wafer and remove contaminant material therefrom.
 4. The method ofclaim 2 including performing step (b) with the wafer at a temperature ofapproximately 400 degrees Centigrade.
 5. The method of claim 3 includingperforming step (b) while applying an RF signal of approximately 100volts and having a frequency of approximately 13.5 MHz to the wafer tocause it to attract the argon ions.
 6. The method of claim 5 includingperforming step (b) for approximately 15-30 seconds.
 7. The method ofclaim 3 wherein step (b) includes providing an argon plasma by means ofan inductive coil wound around a reaction chamber of the first reactorby applying a medium frequency power signal across the inductive coil.8. The method of claim 7 wherein the frequency of the medium frequencypower signal is approximately 100 kHz.
 9. The method of claim 8including passing argon gas into the first reactor at a rate ofapproximately 25 standard cc per minute.
 10. A method for processing apartially fabricated semiconductor wafer having a layer of nichromeresistor material patterned to form a plurality of resistors on asurface of the wafer, the method comprising: (a) performing a wetpre-metallization cleaning step on the surface of the wafer in a firstreactor; (b) passing argon gas into the first reactor with the wafertherein and producing an argon plasma in the first reactor adjacent tothe surface of the wafer by applying a power signal having a frequencyof approximately 100 kHz to an inductive coil wound around a reactionchamber of the first reactor and the applying an RF signal having avoltage of approximately 100 volts and a frequency of approximately 13.5MHz to the wafer for approximately 15-30 seconds to cause argon ions toimpinge on the surface of the wafer and remove contaminant materialtherefrom; (c) advancing the wafer from the first reactor into a secondreactor while maintaining unbroken vacuum conditions in the first andsecond reactors; (d) depositing a layer of metal on the surface of thewafer in the second reactor; (e) patterning the metal to form apredetermined metal interconnection pattern thereof; (f) performing astabilization bake cycle on the wafer, measuring the TCR of the nichromeresistor material, and rejecting the wafer if the measured TCR isgreater than a predetermined value; and (g) completing fabrication ofthe wafer.
 11. The method of claim 10 including performing step (b) withthe wafer at a temperature of approximately 400 degrees Centigrade. 12.The method of claim 11 including passing the argon gas into the firstreactor at a rate of approximately 25 standard cubic centimeters perminute.
 13. A multiple-reactor system for processing a partiallyfabricated semiconductor wafer having a layer of resistor materialpatterned to form a plurality of nichrome resistors on a surface of thewafer, comprising: (a) a first reactor for performing an RF plasmasputter etching process on the surface of the wafer; (b) means in themulti-reactor system for advancing the wafer from the first reactor intoa second reactor while maintaining unbroken vacuum conditions in thefirst and second reactors; and (c) means in the second reactor fordepositing a layer of metal on the surface of the wafer.
 14. Themultiple-reactor system of claim 13 including means for passing argongas into the first reactor with the wafer therein, and means forproducing an inductively coupled plasma of argon ions in first reactoradjacent to the surface of the wafer.
 15. The multiple-reactor system ofclaim 14 including means for applying an RF signal to the wafer to causeit to attract argon ions from the plasma to close argon plans to pinchon the surface of the wafer and remove contaminant material therefrom.16. The multiple-reactor system of claim 15 including means formaintaining the wafer at approximately 400 degrees Centigrade.
 17. Themultiple-reactor system of claim 15 wherein the means for producing anargon plasma includes an inductive coil and conductors for applyingpower at a frequency of approximately 100 kHz to the inductive coil. 18.The multiple-reactor system of claim 17 wherein the RF signal has avoltage of approximately 100 volts and a frequency of approximately 13.5MHz.